

The transistors are formed by a poly gate replacement, “gate last” process, similar to that used by Intel. Hafnium oxide based dielectric was used for the HK layer, over a 2.0 nm thick layer of silicon dioxide. The transistor metallurgy was quite similar to that seen for the Intel 32 nm technology, with a TiN metal gate for the PMOS and a TiAlN metal gate for the NMOS. Embedded SiGe was not used for the PMOS source/drains. The HKMG transistors had the channel direction rotated to the orientation to increase the performance of the PMOS transistors. The XC7K325T was built using TSMC’s HPL technology, and featured 11 layers of backend metallization. We published our Structural Analysis Report in July of 2011. The Xilinx XC7K325T Kintex-7 was the first 28 nm TSMC technology seen by our labs. TSMC claims that their 28 nm process technology entered production in 2010 however, production devices were not available for analysis until mid-2011. The HP and HPL technologies feature HKMG transistors, while the LP uses conventional poly gates, with an ONO gate dielectric. The 28 nm generation was the first time TSMC used high-k metal gate (HKMG) transistors. We have analyzed three of these process variants to date, namely HP, HPL and LP. The 28 nm technology platform appeared in production in 2010 and is offered in four process variants, denoted HP, HPM, HPL and LP.
#TEM XSECTION OF TRANSISTOR FULL#
They presently offer the full range of CMOS technologies from >0.5 µm down to 28 nm. According to their web site their total manufacturing capacity in 2011 was 13.2 million eight-inch wafer equivalents. TSMC was founded in 1987 and is the world’s largest foundry with 2011 revenues reaching $14.5 billion. The TSMC 28 nm technology is offered in four versions and is now shipping in volume for a variety of manufacturers, including Xilinx, Altera, AMD, Qualcomm and others. So while in the first quarter this year 28-nm was about 5% of sales, in the last quarter it is expected to be more than 20%.Īt SEMATECH’s 9th International Symposium of Advanced Gate Stack Technology in Saratoga NY Meikei Ieonge of TSMC presented at nice overview of the TSMC’s 28 nm offering (some details can be found in a previous blog posting). Historically, TSMC was used to a slower ramp with leading customers such as FPGA vendors Altera or Xilinx with 28 nm the ramp included Qualcomm and other mobile-driven companies, and demand switched on much more quickly. In fact, Chairman Morris Chang expects that 28 nm will be the biggest node ever, exceeding the 65 nm node in production volumes, with more than 130,000 wafers per month at the peak. Our analysis suggests that this will be a very profitable technology platform for TSMC and for their fabless design partners for many years to come. TSMC’s 28 nm CMOS technology platform is currently their most advanced offering.
